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Analysis: Huawei remains several years behind Nvidia in AI compute capacity

An analysis of chip performance, production volume, memory supply and software shows Huawei producing far less AI compute than Nvidia in 2026 and likely remaining about four years behind through 2030.

Analysis: Huawei remains several years behind Nvidia in AI compute capacity

This article examines why Huawei remains materially behind Nvidia in AI compute capacity. Comparing per-chip performance and production volumes, Huawei is estimated to produce roughly 25× less aggregate compute than Nvidia in 2026, and available data indicate Huawei will likely remain about four years behind in both chip performance and compute production through 2030.

Why chips and manufacturing matter

AI competitiveness depends on models, data centers, chips and the manufacturing equipment that enables advanced chips. Semiconductor export controls have therefore been central to US policy because they affect how much compute each side can field.

Huawei’s starting position in 2026

  • Performance: Huawei’s flagship 2026 chip, the Ascend 950, delivers roughly 7× less compute throughput than Nvidia’s B300 and about half the throughput of Nvidia’s 2022 H100. This implies Huawei’s leading chip is about two generations behind Nvidia’s.
  • Volume: For 2026, the analysis estimates Huawei will produce about 1.5 million chips versus roughly 6 million for Nvidia.
  • Total compute: Multiplying chip count by per-chip performance yields an aggregate compute output for Huawei that is roughly 25× lower than Nvidia’s in 2026 (measured in H100-equivalents).

Huawei’s roadmap to 2030 (Ascend roadmap)

Huawei has a multi-pronged plan to close the gap by improving chip performance, expanding system interconnects and maturing software, but significant constraints remain.

  • Fabrication constraints: Huawei’s foundry partner SMIC cannot pack transistors as densely as Nvidia’s partner TSMC. US export controls block sales of the advanced lithography tools needed to make the densest chips; China’s domestic alternatives are unlikely to be widely available before 2030.

  • Bigger chips and architecture: Huawei can increase performance by producing larger chips with more or larger logic dies and by optimizing for lower-precision formats to get more operations per silicon area. Larger chips increase costs and defect rates. Nvidia is also expanding package designs and may face fewer defect trade-offs thanks to its more mature process.

  • Vertical stacking (LogicFolding): Huawei plans to stack logic dies vertically to increase transistor count per footprint and reduce communication latency within chips; this LogicFolding approach is slated to appear in Ascend products around 2030. Nvidia’s Feynman generation is expected to stack at least two layers of superior logic dies in 2028, potentially compounding its transistor-density advantage into a larger effective lead.

System-level work: larger domains and software

  • Larger systems: Training frontier models now requires tens of thousands of AI chips, so system-level communication and software coordination matter hugely. Huawei plans much larger domains ("SuperPoDs" of around 8,192 chips) to offset weaker per-chip performance. Large-scale simultaneous high-bandwidth communication across thousands of chips requires trade-offs; Huawei’s design uses a communication hierarchy where nearby chips have higher bandwidth and more distant chips traverse multiple hops. The practical effectiveness of SuperPoDs depends on Huawei’s software keeping communication local; Huawei has not published the key performance metrics.

  • Software (CANN vs CUDA): Huawei’s CANN stack, released in 2018, is less mature than Nvidia’s CUDA. Software improvements can often multiply effective performance by more than 10×, and CUDA is currently a major Nvidia advantage. Real-world difficulties have been reported: when DeepSeek attempted to train its R2 model on Ascend hardware, Huawei engineers assisted but the training run still failed and DeepSeek reverted to Nvidia hardware. If Huawei can lock more Chinese labs into using Ascend and capture the resulting software feedback loop, the gap could narrow, but CANN remains years behind CUDA today.

Expected chip-level lag through 2029

On paper the B300 offers about 7× the compute of the Ascend 950. As Nvidia transitions from Blackwell to Rubin and Rubin Ultra, that chip-level gap could widen to about 9× by 2027. The first Ascend chip expected to approach B300 peak performance is the Ascend 970, planned to ship in late 2028. Because the B300 arrived in 2025, that timeline implies Huawei will remain roughly three to four years behind Nvidia at the chip level through at least 2029.

Can higher volume make up the difference? HBM and production capacity

  • HBM bottleneck: China’s HBM suppliers, notably CXMT and XMC, are only beginning to ramp HBM production and cannot yet meet domestic demand from AI chip designers.

  • Production estimates: Across 2026–2028, Nvidia could plausibly produce tens of millions of H100-equivalents per year, rising to nearly 100 million by 2028. With only CXMT and XMC as HBM sources, Huawei might increase to roughly 1.5 million H100-equivalents per year by 2028 — about 1.5% of Nvidia’s expected output.

  • 2030 outlook: Optimistically, China’s domestic HBM production could ramp substantially (an 18× increase over 2026 levels in this optimistic scenario), but a back-of-the-envelope calculation suggests Huawei’s optimistic 2030 compute output would be similar to what Nvidia produced in 2026. In other words, Huawei’s compute output would still trail Nvidia’s by roughly four years in time.

  • Smuggled HBM and stockpiles: Part of China’s 2025 capacity was filled by illegally acquired components and a stockpile of more than 10 million foreign HBM stacks accumulated before the December 2024 export controls. That stockpile is expected to run out in 2026, after which volumes must rely on domestic production and any continued smuggling.

  • Extreme smuggling scenario: Even if Huawei were to smuggle ten times its domestic HBM capacity in 2028 — an implausibly large and costly flow (over $40 billion at 2025 HBM prices) — Huawei’s output would increase from about 1.5 million H100e to roughly 16 million H100e, still only about 16% of Nvidia’s expected production that year. Thus greater HBM supply, whether domestic or smuggled, moves Huawei’s numbers but does not eliminate the gap.

Conclusion: export controls and compounding Nvidia lead

By early 2026 Huawei produced roughly 25× less AI compute than Nvidia. Its chips are roughly three to four years behind, and China’s supply chain cannot yet match Nvidia’s scale. Export controls significantly contribute to this disadvantage by constraining both performance and volume.

Nvidia is consolidating and widening its lead: its HBM suppliers (SK Hynix, Samsung, Micron) plan hundreds of billions of dollars in fabrication investments through 2030, and Nvidia’s upcoming architectures (Feynman and successors) are expected to deliver further performance gains in the second half of this decade.

Huawei remains one of the world’s most capable engineering organizations and could eventually catch up by outperforming in vertical stacking, maturing its software, gaining access to cutting-edge lithography, and scaling production. However, given the current constraints and timelines, the available information indicates this is unlikely to happen by 2030.